L-tile and H-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

Download
ID 683667
Date 11/11/2021
Public
Document Table of Contents

10.5.3. ebfm_barrd_wait Procedure

The ebfm_barrd_wait procedure reads a block of data from the offset of the specified Endpoint BAR and stores it in BFM shared memory. The length can be longer than the configured maximum read request size; the procedure breaks the request up into multiple transactions as needed. This procedure waits until all of the completion data is returned and places it in shared memory.

Location

altpcietb_g3bfm_rdwr.v

Syntax

ebfm_barrd_wait(bar_table, bar_num, pcie_offset, lcladdr, byte_len, tclass)

Arguments

bar_table

Address of the Endpoint bar_table structure in BFM shared memory. The bar_table structure stores the address assigned to each BAR so that the driver code does not need to be aware of the actual assigned addresses only the application specific offsets from the BAR.

bar_num

Number of the BAR used with pcie_offset to determine PCI Express address.

pcie_offset

Address offset from the BAR base.

lcladdr

BFM shared memory address where the read data is stored.

byte_len

Length, in bytes, of the data to be read. Can be 1 to the minimum of the bytes remaining in the BAR space or BFM shared memory.

tclass

Traffic class used for the PCI Express transaction.

Did you find the information on this page useful?

Characters remaining:

Feedback Message