L-tile and H-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

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ID 683667
Date 11/11/2021
Public
Document Table of Contents

7.1.4.3. JTAG Silicon ID

This read only register returns the JTAG Silicon ID. The Intel Programming software uses this JTAG ID to make ensure that it is programming the SRAM Object File (*.sof) .
Table 57.  JTAG Silicon ID - 0xB8C-0xB98

Bits

Register Description

Default Value

6

Access

[31:0] JTAG Silicon ID DW3 Unique ID RO
[31:0] JTAG Silicon ID DW2 Unique ID

RO

[31:0]

JTAG Silicon ID DW1 Unique ID

RO

[31:0] JTAG Silicon ID DW0 Unique ID RO
6 Because the Silicon ID is a unique value, it does not have a global default value.

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