Intel® Agilex™ General-Purpose I/O and LVDS SERDES User Guide

ID 683780
Date 10/29/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.4.2.5.2. Delay Elements

The Intel® Quartus® Prime software does not automatically set delay elements to maximize slack in the I/O timing analysis. To close the timing or maximize slack, set the delay elements manually in the Intel® Quartus® Prime settings file (.qsf).
Table 30.  Delay Elements .qsf AssignmentsSpecify these assignments in the .qsf to access the delay elements.
Delay Element .qsf Assignment
Input Delay Element
set_intance_assignment –to <PIN> -name INPUT_DELAY_CHAIN <0..63>
Output Delay Element
set_intance_assignment –to <PIN> -name OUTPUT_DELAY_CHAIN <0..15>
Output Enable Delay Element
set_intance_assignment –to <PIN> -name OE_DELAY_CHAIN <0..15>

Did you find the information on this page useful?

Characters remaining:

Feedback Message