Intel® Agilex™ General-Purpose I/O and LVDS SERDES User Guide

ID 683780
Date 10/29/2021

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

5.1.11. Configuration Pins

You must adhere to configuration pin connections requirement and ensure that the pull-up and pull-down resistors are set correctly for your configuration schemes. Refer to Intel® Agilex™ Device Pin Connection Guidelines for detailed pin connection of each configuration pin.

Did you find the information on this page useful?

Characters remaining:

Feedback Message