Intel® Agilex™ General-Purpose I/O and LVDS SERDES User Guide

ID 683780
Date 10/29/2021
Public

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5.1.5. Simultaneous Switching Noise (SSN)

When considering the SSN impact in the design, use differential I/O standards and lower voltage I/O standards for high-switching I/O pins. Place clock and asynchronous control signals near ground signals and away from large switching buses.

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