5.1.17. 1.2 V I/O Interface Voltage Level Compatibility
- Example 1:
- When using 1.2 V LVCMOS, the output signal swings from 0 V to 1.2 V on a lossless transmission line with no external pull-up or pull-down component. You must ensure the VIH or VIL tolerance of the downstream connecting device is able to meet those conditions.
- Example 2:
- When using 1.2V voltage referenced I/O standards, the output signal swing has a dependency on the external board termination or the receiver’s internal termination. The following diagram shows an example termination setup and its equivalent circuit.
When the output buffer is driving HIGH, the pin voltage is 0.93 V based on voltage divider rule.
When the output buffer is driving LOW, the pin voltage is 0.27 V based on voltage divider rule.
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