Intel® Agilex™ General-Purpose I/O and LVDS SERDES User Guide

ID 683780
Date 10/29/2021
Public

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4.3.4. Differential I/O Bit Position

Data synchronization is necessary for successful data transmission at high frequencies.
Figure 56. Bit-Order and Word Boundary for One Differential Channel

This figure shows the data bit orientation for a channel operation and is based on the following conditions:

  • The serialization factor is equal to the clock multiplication factor.
  • The phase alignment uses edge alignment.
  • The operation is implemented in hard SERDES.
Table 69.  Differential Bit NamingThis table lists the conventions for differential bit naming for 12 differential channels. The MSB and LSB positions increase with the number of channels used in a system.
Transmitter Channel Data Number Internal 8-Bit Parallel Data
MSB Position LSB Position
1 7 0
2 15 8
3 23 16
4 31 24
5 39 32
6 47 40
7 55 48
8 63 56
9 71 64
10 79 72
11 87 80
12 95 88

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