Intel® Agilex™ General-Purpose I/O and LVDS SERDES User Guide

ID 683780
Date 10/29/2021
Public

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3.2.2.2. Differential Input RD OCT Restrictions and Guidelines

For interfaces that require external voltage bias circuitry near Intel® Agilex™ device's true differential receiver, you must disable the OCT RD.

Figure 47. External Voltage Bias Circuitry with RD Disabled

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