AN 886: Intel® Agilex™ Device Design Guidelines

ID 683634
Date 8/26/2022
Public
Document Table of Contents

6.1.7. Power Pin Connections and Power Supplies

Table 55.  Power Pin Connections and Power Supplies Checklist
Number Done? Checklist Item
1   Connect all power pins correctly as specified in the Intel® Agilex™ Device Family Pin Connection Guidelines.
2   Connect VCCIO pins and VREF pins to support each bank’s I/O standards.
3   Explore unique requirements for FPGA power pins or other power pins on your board, and determine which devices on your board can share a power rail.
4   Follow the suggested power supply sharing and isolation guidance, and the specific guidelines for each pin in the Intel® Agilex™ Device Family Pin Connection Guidelines.

Intel® Agilex™ devices require various voltage supplies depending on your design requirements.

Intel® Agilex™ devices support a wide range of industry I/O standards. The device output pins do not meet the I/O standard specifications if the VCCIO level is out of the recommended operating range for the I/O standard.

Voltage reference (VREF) pins serve as voltage references for certain I/O standards. The VREF pin is used mainly for a voltage bias and does not source or sink much current. The voltage can be created with a regulator or a resistor divider network.

VREFP_ADC and VREFN_ADC pins are dedicated precision analog voltage reference pins. Both the VREFP_ADC and VREFN_ADC pins need to be grounded to enable the internal ADC reference.

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