AN 886: Intel® Agilex™ Device Design Guidelines

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ID 683634
Date 8/26/2022
Public
Document Table of Contents

9.11.2. Configuration Flash

The following QSPI devices are validated for Intel® Agilex™ SoC configuration:

Table 110.  QSPI Devices
Vendor Part Number Capacity
Micron* MT25QU128 128 Mb
Micron* MT25QU256 256 Mb
Micron* MT25QU512 512 Mb
Micron* MT25QU01G 1 Gb
Micron* MT25QU02G 2 Gb
Macronix* MX25U128 128 Mb
Macronix* MX25U256 256 Mb
Macronix* MX25U512 512 Mb
Macronix* MX66U512 512 Mb
Macronix* MX66U1G 1 Gb
Macronix* MX66U2G 2 Gb

GUIDELINE: When configuring FPGA from flash, select a compatible QSPI device.

GUIDELINE: Select the QSPI device that fits your design. Using a larger device allows for increases in the design bitstream size.

GUIDELINE: Connect the serial flash or quad SPI flash reset pin to the AS_nRST pin.

The SDM must fully control the QSPI reset. Do not connect the quad SPI reset pin to any external host.

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