AN 886: Intel® Agilex™ Device Design Guidelines

ID 683634
Date 8/26/2022
Public
Document Table of Contents

1.1. Design Flow

Table 1.  Summary of the Design Flow Stage and Guideline Topics
Stages of the Design Flow Description
System Specification Planning, design specifications, IP selection
Device Selection Device information, determining device variant and density, package offerings, migration, speed grade
Security Considerations Authentication, encryption, base security, firewalls and fuses
Hard Processor System Bandwidth analysis, firewall planning, HPS boot methods, reset and I/O planning, peripheral, bridge and SDRAM configuration
Design Entry Coding styles and design recommendations, Platform Designer, planning for hierarchical or team-based design
Board considerations Intel® FPGA Power and Thermal Calculator, thermal management option, board design guidelines, configuration scheme, boot mode, signal integrity, I/O and clock planning, pin connections, reset plan, memory interfaces, verification
Design verification System console, simulation, debug timing analysis
Debugging Debug tools, remote debugging, simulation, system console, JTAG
Embedded software design guidelines Software requirements and architecture, tools, driver considerations, application development, test and validate

The flow diagram depicted below represents the general high level design flow when you design with an Intel® Agilex™ FPGA device. Certain points in the design flow such as IP selection may be iterative; and others, such as security considerations may be encountered at multiple points in your design.

Figure 1.  Intel® Agilex™ Device Design Flow

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