AN 886: Intel® Agilex™ Device Design Guidelines

ID 683634
Date 8/26/2022
Public
Document Table of Contents

6.1.8.4.2. Dual Purpose Configuration Pins

Table 68.  Dual Purpose Configuration Pins Checklist
Number Done? Checklist Item
1   Plan the dual purpose pins that can function as configuration pins and user I/O pins.

The below configuration pins used for the Avalon® -ST ×16 and ×32 configuration schemes can optionally be used as user I/O pins after configuration has completed. Enable the pins to function as dual purpose pins in the Intel® Quartus® Prime software prior to compilation, if desired.

  • AVST_CLK
  • AVST_VALID
  • AVST_DATA[15:0]
  • AVST_DATA[31:16]—for Avalon® -ST ×32 configuration scheme

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