22.214.171.124. Configuration Sources
The initial FPGA configuration and the HPS FSBL are part of the initial configuration bitstream, which can be obtained from several sources:
- Avalon® -ST Data Source: An external Avalon® -ST master provides the bitstream.
- JTAG Interface: An external JTAG master (usually driven by a host tool) provides the bitstream.
- SDM Flash: A flash device connected on SDM side provides the bitstream.
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