220.127.116.11.1. HPS EMAC PHY Interfaces
- Reduced Media Independent Interface (RMII)
- Reduced Gigabit Media Independent Interface (RGMII)
GUIDELINE: When selecting a PHY device, consider the desired Ethernet rate, available I/O and available transceivers, PHY devices that offer the skew control feature, and device driver availability.
It is possible to adapt the MII/GMII PHY interfaces exposed to the FPGA fabric by the HPS component to other PHY interface standards such as RMII, SGMII, SMII and TBI using soft adaptation logic in the FPGA and features in the general-purpose FPGA I/O and transceiver FPGA I/O.
For more information, refer to the device drivers available for your operating system of choice or the Linux device driver provided with the Intel® Agilex™ Transceiver-SoC Development Kit.
The EMAC provides a variety of PHY interfaces and control options through the HPS and the FPGA I/Os.
Determine Ethernet Rate
- Intel® Agilex™ Hard Processor System Technical Reference Manual
- Intel® Agilex™ FPGA Data Sheet
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