AN 886: Intel® Agilex™ Device Design Guidelines

ID 683634
Date 8/26/2022
Public
Document Table of Contents

5.1.7.2. USB Interface Design Guidelines

The Intel® Agilex™ HPS can connect its embedded USB MACs directly to industry-standard USB 2.0 ULPI PHYs using the 1.8 V dedicated HPS I/O. No FPGA routing resources are used and timing is fixed, which simplifies design.

For more information about the design considerations for USB, refer to the Intel® Agilex™ Hard Processor System Technical Reference Manual.

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