AN 886: Intel® Agilex™ Device Design Guidelines

ID 683634
Date 8/26/2022
Public
Document Table of Contents

6.3.1. Board-Related Intel® Quartus® Prime Settings

Table 78.  Board-Related Intel® Quartus® Prime Settings Checklist
Number Done? Checklist Item
1   Set the settings for the FPGA I/O pins correctly and plan for the functionality during board design.

The Intel® Quartus® Prime software provides options for the FPGA I/O pins that you should consider during board design. Ensure that these options are set correctly when the Intel® Quartus® Prime project is created, and plan for the functionality during board design.

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