AN 886: Intel® Agilex™ Device Design Guidelines

ID 683634
Date 8/26/2022
Public
Document Table of Contents

2.5. Preparing for Design Entry

In complex FPGA design development, design practices, coding styles, and IP cores have an enormous impact on your device’s timing performance, logic utilization, compilation time, and system reliability. In addition, while planning and creating the design, plan for a hierarchical or team-based design to improve design productivity.

Did you find the information on this page useful?

Characters remaining:

Feedback Message