External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022
Public

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4.1.1.21. ctrl_ecc_status for DDR4

Controller ECC status interface
Table 34.  Interface: ctrl_ecc_statusInterface type: Conduit
Port Name Direction Description
ctrl_ecc_sts_intr Output ECC interrupt status - '1' indicates interrupt occurred.
ctrl_ecc_sts_sbe_error Output '1' indicates SBE occurred.
ctrl_ecc_sts_dbe_error Output '1' indicates DBE occurred.
ctrl_ecc_sts_corr_dropped Output Correction command dropped status, '1' indicates correction command dropped.
ctrl_ecc_sts_sbe_count Output Number of times SBE error occurred.
ctrl_ecc_sts_dbe_count Output Number of times DBE error occurred.
ctrl_ecc_sts_corr_dropped_count Output Number of times correction command dropped.
ctrl_ecc_sts_err_addr Output Address of the most recent SBE or DBE.
ctrl_ecc_sts_corr_dropped_addr Output Address of the most recent correction command dropped.

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