External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022
Public

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11.7.4.9. Pin Delay Settings Tab

The Pin Delay Settings tab lets you view and change delay values on specific pins.

You can select the Pin Type, Pin ID, Rank, and Direction values of a delay that you are interested in, and the toolkit displays the delay value in the Delay Setting (taps) field.

Figure 188. Pin Delay Settings Tab

If you make changes to Delay Setting (taps) the delay value is updated in hardware. After the value changes in hardware and no longer matches the setting found in calibration, you receive a warning message indicating that the margins in the Calibration tab are out-of-date.

Figure 189. Margins Out-of-Date Warning Message

To restore the delay settings to the values found during the most recent calibration, click Pin Delay Settings > Restore Delay Settings .

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