External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022
Public

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8.2. Optimizing Timing

The Intel® Quartus® Prime software offers several advanced features that you can use to assist in meeting core timing requirements.
  1. On the Assignments menu, click Settings. In the Category list, click Compiler Settings. Under Optimization mode, select one of the Performance options.
  2. On the Assignments menu, click Settings. In the Category list, click Compiler Settings > Advanced Settings (Synthesis). For Optimization Technique, select Speed.
  3. On the Assignments menu, click Settings. In the Category list, click Compiler Settings > Advanced Settings (Fitter). For Physical Placement Effort, select High Effort or Maximum Effort. The High and Maximum effort settings take additional compilation time to further optimize placement.
  4. On the Assignments menu, click Settings. In the Category list, click Compiler Settings > Advanced Settings (Fitter). For Placement Effort Multiplier, select a number higher than the preset value of 1.0. A higher value increases CPU time, but may improve placement quality.

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