External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022

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Document Table of Contents emif_calbus_clk for DDR4

EMIF calibration component clock input interface
Table 38.  Interface: emif_calbus_clkInterface type: Clock Output
Port Name Direction Description
calbus_clk Output EMIF Calibration component bus for the clock