External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022
Public

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4.1.1.9. afi_reset_n for DDR4

AFI reset interface
Table 22.  Interface: afi_reset_nInterface type: Reset Output
Port Name Direction Description
afi_reset_n Output Reset for the AFI clock domain. Asynchronous assertion and synchronous deassertion

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