External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022

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Document Table of Contents afi for QDR-IV

Altera PHY Interface (AFI)
Table 50.  Interface: afiInterface type: Conduit
Port Name Direction Description
afi_ld_n Input Synchronous load for port A and B
afi_rw_n Input Synchronous read/write for port A and B
afi_lbk0_n Input Loopback mode
afi_lbk1_n Input Loopback mode
afi_cfg_n Input Configuration bit
afi_ap Input Address parity
afi_ainv Input Address inversion
afi_rdata_dinv Output Data inversion for read data
afi_wdata_dinv Input Data inversion for write data
afi_pe_n Output Address parity error flag