External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022
Public

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11.6.1.2.5. Address and Command Signals

Confirm that address and command signals are reaching the memory devices correctly.

After the memory interface has been successfully calibrated, you can probe the ALERT_N pin to determine if any memory component has encountered an address and command parity error.

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