External Memory Interfaces Intel® Agilex™ FPGA IP User Guide

ID 683216
Date 6/20/2022
Public

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11.7.2.2. Creating a Design Example with Multiple External Memory Interfaces

To create a design example with two or more external memory interfaces, follow these steps:
  1. On the Example Designs tab, specify the number of external memory interfaces in the design example..
  2. Select the Cal-IP to specify the connection of each interface to the Calibration IP.
    Note: Ensure that any interfaces located in the same I/O row are connected to the same Cal-IP.
  3. Parameterize the interface as you normally would.
  4. After you have fully parameterized the interface, return to the Example Designs tab and click Capture on the desired EMIF ID, so that the EMIF IP has the parameter settings established in step 3.
  5. Repeat steps 2 through 4 for all EMIF IDs. (If you want to make changes to the EMIF IP, you can click the Clear button to remove the captured parameters, and then repeat steps 2 to 4.)
    Figure 168. Generating a Design Example with Multiple EMIFs

    Figure 169. Generating a Design Example After All EMIFs are Configured
  6. After you have configured all the EMIF IPs, generate the design example by clicking Generate Example Design in the upper-right corner of the window as shown in the figure above.
  7. Add pin assignments for all the EMIF IPs.
  8. Compile the design.
Note: If you choose to manually add multiple EMIF instances to your design using Platform Designer, ensure that you do the following:
  • Use the ed_synth.qsys file generated for the design example as a starting point to make the necessary edits.
  • Use a single .qsys file to create the connections for all the external memory interfaces in the design. (The system must have a flat hierarchy to work with the Calibration Debug Toolkit.)

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