3.1.1. Intel® Agilex™ EMIF Architecture: I/O Subsystem
The I/O subsystem provides the following features:
- General-purpose I/O registers and I/O buffers
- On-chip termination control (OCT)
- I/O PLLs
- I/O Bank I/O PLL for external memory interfaces and user logic
- Fabric-feeding for non-EMIF/non-LVDS SERDES IP applications
- True Differential Signaling
- External memory interface components, as follows:
- Hard memory controller
- Hard PHY
- Hard Nios processor and calibration logic
The following figure depicts the I/O subsystem structure for AGF014/AGF012 series devices. I/O banks 2B and 3B are the locations of calibration I/O SSMs in these devices.
Did you find the information on this page useful?