Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Document Table of Contents

4. Transceiver Configurations in Stratix V Devices

Stratix® V devices have a dedicated transceiver physical coding sublayer (PCS) and physical medium attachment (PMA) circuitry.

To implement a protocol, use a PHY IP listed in Table 30.

Stratix V devices support the following communication protocols:

  • 10GBASE-R and 10GBASE-KR
  • Interlaken
  • PCI Express® (PCIe®)—Gen1, Gen2, and Gen3
  • CPRI and OBSAI—Deterministic Latency Protocols
  • XAUI

Support for other communication protocols or user-defined protocols can be enabled with the following PHY IPs:

  • Native PHY IP using standard PCS and 10G PCS hardware options including reconfigurability between different PCS options
  • Custom PHY IP using the standard PCS in a custom datapath
  • Low Latency PHY IP using the standard or 10G PCS in a low latency datapath configuration