Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Public
Document Table of Contents

1.2.7.4. Calibration Block Boundary

There is one calibration block in each quadrant of the device.

The calibration block also uses the reconfiguration controller clock (mgmt_clk_clk ). This puts a restriction on the number of different reconfiguration clock sources that can be used in the design. All the transceiver channels controlled by a single calibration block must be connected to the same reconfiguration clock source.

Note: You can connect multiple reconfiguration controllers to the same clock source.
Table 4.  Transceiver Calibration Block Boundary for Stratix V Devices
Stratix V Device Package Total Number of Transceiver channels in device Total Number of Transceiver Channels per Side Number of Contiguous Transceiver Channels Controlled by the Top Calibration Block (counting from top to bottom) Number of Contiguous Transceiver Channels Controlled by the Bottom Calibration Block (counting from bottom to top)
5SGTC5 KF40 36 24 (Left) / 12 (Right) 12 12
5SGTC7 KF40 36 24 (Left) / 12 (Right) 12 12
5SGXA3 EH29 12 12 (Left only) 6 6
HF35 24 12 6 6
KF35 36 18 9 9
KF40/KH40 36 18 9 9
5SGXA4 HF35 24 12 6 6
KF35 36 18 9 9
KF40/KH40 36 18 9 9
5SGXA5 HF35 24 12 6 6
KF35 36 18 9 9
KF40/KH40 36 18 9 9
NF40 48 24 12 12
5SGXA7 HF35 24 12 6 6
KF35 36 18 9 9
KF40/KH40 36 18 9 9
NF40 48 24 12 12
5SGXA9 KF40/KH40 36 18 9 9
NF45 48 24 12 12
5SGXAB KF40/KH40 36 18 9 9
NF45 48 24 12 12
5SGXB5 RF40 66 33 15 18
  RF43 66 33 15 18
5SGXB6 RF40 66 33 15 18
  RF43 66 33 15 18
5SGXB9 RH43 66 33 15 18
5SGXBB RH43 66 33 15 18
5SGSD3 EH29 12 12 (Left only) 6 6
HF35 24 12 6 6
5SGSD4 EH29 12 12 (Left only) 6 6
HF35 24 12 6 6
KF40 36 18 9 9
5SGSD5 HF35 24 12 6 6
KF40 36 18 9 9
5SGSD6 KF40 36 18 9 9
NF45 48 24 12 12
5SGSD8 KF40 36 18 9 9
NF45 48 24 12 12

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