Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Document Table of Contents Clock Dividers

Each transmitter channel has a local clock divider. Some of the clock dividers that drive the x6 and xN clock lines are called central clock dividers.

Central clock dividers are located in channels 1 and 4 of the GX transceiver bank. The clock dividers generate the parallel and serial clock sources for the transmitter and optionally for the receiver PCS. The central clock dividers can feed the clock lines used to bond channels.

Figure 54. Clock Dividers

Note: For more information about clock dividers and the division factors supported, refer to the Transceiver Architecture in Stratix V Devices chapter.