Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Public
Document Table of Contents

2.2.2.2.2. Non-Bonded Channel Configurations Using the xN Clock Network

In non-bonded channel configurations using the xN clock network, the parallel clock is generated by the clock divider of the individual channels.
Figure 59. Transmitter Channels in xN Non-Bonded ConfigurationThe figure shows 11 transmitter channels in non-bonded configuration. These channels are driven by the ATX PLL of the transceiver bank 1 which drives the x6 clock line through the central clock divider of the transceiver channel 1 in bank 1. The local clock divider block of each channel generates its own parallel clock by dividing the serial clock from the xN clock line. The channel where the central clock divider resides cannot generate the parallel clock and therefore it cannot be used as a data channel.


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