Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Public
Document Table of Contents

4.5.1. Transceiver Datapath in a XAUI Configuration

The XAUI PCS is implemented in soft logic inside the FPGA core when using the XAUI PHY IP core. You must ensure that your channel placement is compatible with the soft PCS implementation.
Figure 128. XAUI Datapath Configuration


Figure 129. Transceiver Channel Datapath for XAUI ConfigurationStandard PCS in a low latency configuration is used in this configuration. Additionally, a portion of the PCS is implemented in soft logic.


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