Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 2/15/2017
Public
Document Table of Contents

1.5.3.2. Electrical Idle Inference

In conjunction with side band signals from the FPGA side, the Electrical Idle Inference feature infers Electrical Idle assuming that the signal detect is not reliable. This is based on the PCIe Base Specification Revision 2.0/3.0.

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