Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Public
Document Table of Contents

3.2.5. Resetting the Receiver with the User-Coded Reset Controller During Device Operation

Follow this reset sequence to reset the analog or digital blocks of the receiver at any point during the device operation. This might be necessary for re-establishing a link or after certain dynamic reconfigurations.

The numbers in the following figure correspond to the following numbered list, which guides you through the receiver reset sequence during device operation.

  1. Assert rx_analogreset and rx_digitalreset at any point independently. However, you must assert rx_digitalreset every time rx_analogreset is asserted to reset the PCS blocks.
  2. Deassert rx_analogreset after a minimum duration of 40 ns (trx_analogreset).
  3. rx_is_lockedtodata is a status signal from the receiver CDR that indicates that the CDR is in the lock to data (LTD) mode. Ensure rx_is_lockedtodata is asserted and stays asserted before deasserting rx_digitalreset.
  4. Deassert rx_digitalreset after a minimum duration of tLTD after rx_is_lockedtodata stays asserted. Ensure rx_analogreset is deasserted.
Note: rx_is_lockedtodata might toggle when there is no data at the receiver input. rx_is_lockedtoref is a don't care when rx_is_lockedtodata is asserted.
Figure 84. Reset Sequence Timing Diagram for Receiver using the User-Coded Reset Controller during Device Operation

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