4.5.3. Transceiver Clocking and Channel Placement Guidelines
|Input Reference Clock Frequency (MHz)||FPGA Fabric-Transceiver Interface Width||FPGA Fabric-Transceiver Interface Frequency (MHz)|
|156.25||16-bit data, 2-bit control||156.25|
Transceiver Channel Placement Guidelines
In the soft PCS implementation of the XAUI configuration, all four channels must be placed continuously. The channels may all be placed in one bank or they may span two banks.
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