Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Public
Document Table of Contents

3.2.2. Resetting the Transmitter with the User-Coded Reset Controller During Device Power-Up

Follow this reset sequence when designing your User-Coded Reset Controller to ensure a reliable transmitter initialization after the initial power-up.

The numbers in the figure correspond to the following numbered list, which guides you through the transmitter reset sequence during device power-up.

  1. To reset the transmitter, begin with:
    • Assert mgmt_rst_reset at power-up to start the calibration IPs. Hold mgmt_rst_reset active for a minimum of two reset controller clock cycles.
    • Assert and hold pll_powerdown, tx_analogreset, and tx_digitalreset at power-up to reset the transmitter. You can deassert tx_analogreset at the same time as pll_powerdown.
    • Assert pll_powerdown for a minimum duration of 1 μs (tpll_powerdown). If you use ATX PLL calibration, deassert pll_powerdown before mgmt_rst_reset so that the ATX PLL is not powered down during calibration. Otherwise, pll_powerdown can be deasserted anytime after mgmt_rst_reset is deasserted.
    • Make sure there is a stable reference clock to the PLL before deasserting pll_powerdown and mgmt_rst_reset.
  2. After the transmitter PLL locks, the pll_locked status gets asserted after tpll_lock.
  3. After the transmitter calibration completes, the tx_cal_busy status is deasserted. Depending on the transmitter calibrations, this could happen before or after the pll_locked is asserted.
  4. Deassert tx_digitalreset after the gating conditions occur for a minimum duration of ttx_digitalreset. The gating conditions are:
    • pll_powerdown is deasserted
    • pll_locked is asserted
    • tx_cal_busy is deasserted
The transmitter is out of reset and ready for operation.
Note: During calibration, pll_locked might assert and deassert as the calibration IP runs.
Figure 81.  Reset Sequence Timing Diagram for Transmitter using the User-Coded Reset Controller during Device Power-Up
Table 26.  Guidelines for Resetting the PLL, TX PMA, and TX PCS
To Reset You Must Reset
PLL

pll_powerdown

tx_analogreset

tx_digitalreset

TX PMA

tx_analogreset

tx_digitalreset

TX PCS

tx_digitalreset

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