Visible to Intel only — GUID: nik1409773827215
Ixiasoft
Visible to Intel only — GUID: nik1409773827215
Ixiasoft
1.4.2.6. Disparity Generator
The disparity generator block conforms to the Interlaken protocol specification and provides a DC-balanced data output. The disparity generator receives data from the scrambler and inverts the running disparity to stay within the ±96-bit boundary. To ensure this running disparity requirement, the disparity generator inverts bits [63:0] and sets bit [66] to indicate the inversion.
MSB | Interpretation |
---|---|
0 | Bits [63:0] are not inverted; the disparity generator processes the word without modification |
1 | Bits [63:0] are inverted; the disparity generator inverts the word before processing it |
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