Stratix V Device Handbook: Volume 2: Transceivers

ID 683779
Date 11/23/2021
Document Table of Contents RX Pins Using the Reference Clock Network

The RX pins can be used as refclk pins. The RX pins can drive any transmitter PLL on the same side of the device through the reference clock network. Only one RX differential pin pair per three channels can be used as a reference clock and there is no /2 factor available, unlike the dedicated reference clock pin, as shown in the Figure 45.
Note: For more information about the QSF assignments, refer to the Altera Transceiver PHY IP Core User Guide and the Stratix V Device Datasheet for the supported I/O standards.