188.8.131.52. Root Port Mode
- Bursting Master (in bursting and non-bursting modes)
- Bursting Slave (in non-bursting mode)
- Control Register Access
The IP core must be able to generate and process configuration reads and writes to the Endpoint and to the Hard IP configuration registers. This is done via the Configuration Slave. Since the DMA controller resides on the Endpoint side, its control registers need to be programmed by the FPGA local processor. Using the Bursting Slave (in non-bursting mode), the local processor can program the Endpoint control registers for DMA operations. The Endpoint can also send updates of its DMA status to the local processor via the Bursting Master.