P-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

ID 683268
Date 7/14/2021
Public
Document Table of Contents

3.2.3. Device Identification Registers

The following table lists the default values of the Device ID registers. You can use the parameter editor to change the values of these registers.

Table 20.  Device ID Registers
Register Name Range Default Value Description
Vendor ID 16 bits 0x00001172

Sets the read-only value of the Vendor ID register. This parameter cannot be set to 0xFFFF per the PCI Express Base Specification.

Note: Set your own Vendor ID by changing this parameter.

Address offset: 0x000.

Device ID 16 bits 0x00000000

Sets the read-only value of the Device ID register. This register is only valid in the Type 0 (Endpoint) Configuration Space.

Note: Set your own Device ID by changing this parameter.

Address offset: 0x000.

Revision ID 8 bits 0x00000001

Sets the read-only value of the Revision ID register.

Note: Set your own Revision ID by changing this parameter.

Address offset: 0x008.

Class Code 24 bits 0x00FF0000

Sets the read-only value of the Class Code register.

Note: Set your own Class Code by changing this parameter.

Address offset: 0x008.

This parameter cannot be set to 0x0 per the PCI Express Base Specification.

Subsystem Vendor ID 16 bits 0x00000000

Sets the read-only value of the Subsystem Vendor ID register in the PCI Type 0 Configuration Space. This parameter cannot be set to 0xFFFF per the PCI Express Base Specification. This value is assigned by PCI-SIG to the device manufacturer.

Note: Set your own Subsystem Vendor ID by changing this parameter.

Address offset: 0x02C.

Subsystem Device ID 16 bits 0x00000000

Sets the read-only value of the Subsystem Device ID register in the PCI Type 0 Configuration Space.

Note: Set your own Subsystem Device ID by changing this parameter.

Address offset: 0x02C.

Did you find the information on this page useful?

Characters remaining:

Feedback Message