P-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

ID 683268
Date 7/14/2021
Public
Document Table of Contents

4.3.1.3.1. Read Data Mover Avalon® -MM Write Master and Conduit

This interface provides the Read data from the Host memory to the user application. The rddm_address_o value is set within the descriptor destination address.

Table 29.  Read Data Mover Avalon® -MM Write Master and Conduit
Signal Name Direction Description Platform Designer Interface Name
rddm_pfnum_o[1:0] O
Physical function number.
  • PF0: rddm_pfnum_o[1:0] = 2'b00
  • Others: rddm_pfnum_o[1:0] = Reserved
rddm_conduit
rddm_waitrequest_i I

When asserted, indicates that the Avalon® -MM slave is not ready to respond to a request.

waitrequestAllowance = 16

The master can still issue 16 transfers after rddm_waitrequest_i is asserted.

rddm_master
rddm_write_o O When asserted, indicates the master is requesting a write transaction.
rddm_address_o[63:0] O Specify the byte address regardless of the data width of the master.
rddm_burstcount_o[3:0] O The master uses these signals to indicate the number of transfers in each burst.
rddm_byteenable_o[63:0] O Specify the valid bytes of rddm_writedata_o[511:0]. Each bit corresponds to a byte in rddm_writedata_o[511:0].
rddm_writedata_o[511:0] O Data signals for write transfers.

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