P-tile Avalon® Memory-mapped Intel® FPGA IP for PCI Express* User Guide

ID 683268
Date 7/14/2021
Public
Document Table of Contents

3.2.2.1. Device Capabilities

Table 14.  Device Capabilities
Parameter Value Default Value Description
Maximum payload sizes supported

128 bytes

256 bytes

512 bytes

512 bytes Specifies the maximum payload size supported. This parameter sets the read-only value of the max payload size supported field of the Device Capabilities register.
Support Extended Tag Field True/False False Sets the Extended Tag Field Supported bit in the Device Capabilities Register.

This tab also contains the sub-tab PCIeN Multifunction and SR-IOV System Settings. Details about this sub-tab are in the next section.

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