PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 6/21/2022

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Document Table of Contents RZQ_GROUP Assignment

The RZQ_GROUP assignment creates the OCT Intel FPGA IP without modifying the RTL. The Fitter searches for the rzq pin name in the netlist. If the pin does not exist, the Fitter creates the pin name along with the OCT Intel FPGA IP and its corresponding connections. This allows you to create a group of pins to be calibrated by an existing or non-existing OCT and the Fitter ensures the legality of the design. You must associate the terminated pins of the PHY Lite for Parallel Interfaces IP instance with an RZQ pin at the system level manually.

Use the following steps to set RZQ pin locations for the PHY Lite for Parallel Interfaces IP:

  1. In the Group <x> OCT Settings tab, disable Use Default OCT Values and Expose termination ports.
    Figure 76.  Group <x> OCT Settings Parameter Settings
  2. Generate the IP or instantiate the IP into your project.
  3. You can view the available RZQ pins location in the Pin Planner. Go to Pin Planner > Tasks > OCT Pins and double click the RZQ. The available RZQ pins are display in the pin grid diagram.
  4. You can modify the qsf in your project to change the default RZQ location using the following command:
    set_location_assignment <rzq_capable_pin_location> –to <user_defined_rzq_pin_name>
  5. Use the following command to associate the terminated pins of the IP with the RZQ pin:
    set_instance_assignment -name RZQ_GROUP <rzq_pin_name> -to <altera_phylite_strobe_pin>
    set_instance_assignment -name RZQ_GROUP <rzq_pin_name> -to <altera_phylite_data_pin[*]>
    where * represents all the data pins within the same group.
    This is an example of a qsf file with modified RZQ pin location assignments:
    set_location_assignment PIN_AH3 -to octrzq
    set_instance_assignment -name IO_STANDARD "1.5 V" -to octrzq
    set_instance_assignment -name RZQ_GROUP OCTRZQ -to group_0_io_interface_conduit_end_io_strobe_io
    set_instance_assignment -name RZQ_GROUP OCTRZQ -to group_0_io_interface_conduit_end_io_data_io[*]
  6. Compile the project.
  7. To verify that the Intel® Quartus® Prime has successfully created and assigned the RZQ pin to the correct location, go to Pin Planner > Node Name and look for <user_defined_rzq_pin_name> with the assigned pin location in the list.