PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 6/21/2022
Document Table of Contents Clock Frequency Relationships

The following equations describe the relationships between the clock domains available in the PHY Lite for Parallel Interfaces IP.

Core Clock Rate = Interface clock frequency / Core clock frequency

VCO frequency Multiplier Factor = VCO clock frequency 3 / Interface clock frequency

3 You can obtain this value from the VCO clock frequency parameter under General Tab in the IP parameter editor.

Did you find the information on this page useful?

Characters remaining:

Feedback Message