PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

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ID 683716
Date 6/21/2022
Public
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3.2.5.2.1. Strobes

The first pins listed in the pin address lookup table are the strobes. They are also identified by bits[7:4] = 0xE. For separate strobes, the input strobe pin placement always take precedence. For differential and complementary strobes, the positive pin is the lower index.

Note: You can modify the output phase of differential strobes by writing to either the positive or negative pin. Only one write is necessary. This is also the case for output-only complementary strobes.

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