PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 6/21/2022
Public
Document Table of Contents

3.6.1.1. Design Example without Dynamic Reconfiguration

When the Enable dynamic reconfiguration option is not selected, Intel® Quartus® Prime software generates a design example of PHY Lite for Parallel Interfaces IP without a dynamic reconfiguration module.

This design example consists of simulation and synthesis design files.

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