PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide

ID 683716
Date 6/21/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents Clock Frequency Relationships

The following equations describe the relationships between the clock domains available in the PHY Lite for Parallel Interfaces IP core.

Core Clock Rate = Interface clock frequency / Core clock frequency

VCO frequency Multiplier Factor = VCO clock frequency 7 / Interface clock frequency

7 You can obtain this value from the VCO clock frequency parameter under General Tab in the IP parameter editor.