E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 9/26/2022
Public
Document Table of Contents

2.9.2.12. 100G UI Adjustment

This section provides the steps to measure UI value to prevent time drift due to clock PPM as reference to golden Time-of-Day (ToD) in the platform.
Tip: Do not perform the measurement if there is a large adjustment to the ToD value, as it impacts the measurement result which is based on principle that the ToD value is incremented constantly based on golden ToD running at ideal clock with 0ppm.

TAM is reference time for Alignment Marker (AM) for variants with AM, and arbitrary selected reference bit for variants without AM.

  1. Request snapshot of initial TX TAM and RX TAM:
    csr_write (mlptp_tam_snapshot, 1’b1)
  2. Read snapshotted initial TAM and counter values:
    tx_tam_0_31_0 = csr_read (mlptp_tx_tam_l[31:0])
    tx_tam_0_47_32 = csr_read (mlptp_tx_tam_h[15:0])
    tx_tam_0_cnt = csr_read (mlptp_tx_am_count[15:0])
    
    rx_tam_0_31_0 = csr_read (mlptp_rx_tam_l[31:0])
    rx_tam_0_47_32 = csr_read (mlptp_rx_tam_h[15:0])
    rx_tam_0_cnt = csr_read (mlptp_rx_am_count[15:0])
    
    Form complete TAM by concatenation
    
    tx_tam_0 = {tx_tam_0_47_32, tx_tam_0_31_0};
    rx_tam_0 = {rx_tam_0_47_32, rx_tam_0_31_0};
    
  3. Clear snapshot:
    csr_write (mlptp_tam_snapshot, 1’b0)
  4. Starting from time when step 1 is executed, wait for time duration as specified in section Minimum and Maximum Reference Time (TAM) Interval for UI Measurement (Hardware).
  5. Request snapshot of Nth TX TAM and RX TAM:
    csr_write (mlptp_tam_snapshot, 1’b1)
  6. Read snapshotted Nth TAM and counter values:
    tx_tam_n_31_0 = csr_read (mlptp_tx_tam_l[31:0])
    tx_tam_n_47_32 = csr_read (mlptp_tx_tam_h[15:0])
    tx_tam_n_cnt = csr_read (mlptp_tx_am_count[15:0])
    
    rx_tam_n_31_0 = csr_read (mlptp_rx_tam_l[31:0])
    rx_tam_n_47_32 = csr_read (mlptp_rx_tam_h[15:0])
    rx_tam_n_cnt = csr_read (mlptp_rx_am_count[15:0])
    
    Form complete TAM by concatenation
    
    tx_tam_n = {tx_tam_n_47_32, tx_tam_n_31_0};
    rx_tam_n = {rx_tam_n_47_32, rx_tam_n_31_0};
    
  7. Clear snapshot:
    csr_write (mlptp_tam_snapshot, 1’b0)
  8. Calculation:
    1. Get TAM interval (tx_tam_interval and rx_tam_interval) from 10G/25G TX and RX Unit Interval Adjustment.
    2. Calculate time elapsed:
      tx_tam_delta = (tx_tam_n <= tx_tam_0) ? [(tx_tam_n + 10^9ns) – tx_tam_0] : (tx_tam_n – tx_tam_0)
      
      rx_tam_delta = (rx_tam_n <= rx_tam_0) ? [(rx_tam_n + 10^9ns) – rx_tam_0] : (rx_tam_n – rx_tam_0)
      
      Note: 10^9ns = 48’h 3B9A_CA00_0000
    3. Calculate estimated count value:
      tx_tam_cnt_est	= round_up_to_nearest_integer(tx_tam_delta / (tx_tam_interval * 0ppm_UI))
      rx_tam_cnt_est	= round_up_to_nearest_integer(rx_tam_delta / (rx_tam_interval * 0ppm_UI))
      
      Where 0ppm_UI is 38.7878 ps.
      
      If tx_tam_cnt_est or rx_tam_cnt_est > 64000, which indicates 16-bit counters may have already overflow 2 times or more, you must restart from step 1.
      

      This step is optional, and required only if snapshot may happen longer than duration specified in Minimum and Maximum Reference Time (TAM) Interval for UI Measurement (Hardware). For example: The read response of System-console via JTAG master is slow.

    4. Calculate TAM count value:
      tx_tam_cnt = (tx_tam_n_cnt < tx_tam_0_cnt) ? [(tx_tam_n_cnt + 2^16) – tx_tam_0_cnt] : (tx_tam_n_cnt – tx_tam_0_cnt)
      
      rx_tam_cnt = (rx_tam_n_cnt < rx_tam_0_cnt) ? [(rx_tam_n_cnt + 2^16) – rx_tam_0_cnt] : (rx_tam_n_cnt – rx_tam_0_cnt)
      
    5. Calculate UI value:
      tx_ui = (tx_tam_delta) / (tx_tam_cnt * tx_tam_interval / 4)
      rx_ui = (rx_tam_delta) / (rx_tam_ cnt * rx_tam_interval / 4) * 330
      
  9. Write the calculated UI value to IP:
    csr_write (mlptp_tx_ui, tx_ui)
    csr_write (mlptp_rx_ui, rx_ui)
    

    Ensure the format is {4-bit nanoseconds, 24-bit fractional nanoseconds}.

  10. After first UI measurement, for every minimum TAM interval or longer duration, repeat step 1 to 9. This is to prevent time counter drift from golden Time-of-Day in the system whenever clock ppm changes.

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