E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 12/28/2022
Document Table of Contents

2.4.2. Compilation Checking

Intel performs compilation testing on an extensive set of E-Tile Hard IP for Ethernet Intel FPGA IP variations and designs that target different devices, to ensure the Intel® Quartus® Prime Pro Edition software places and routes the IP core ports correctly.

Did you find the information on this page useful?

Characters remaining:

Feedback Message