E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 9/26/2022
Public
Document Table of Contents

2.9.2.14. PTP System Considerations

This section provides list of generic guidelines required when using PTP IP.
  • You need to wait for the o_tx_ptp_ready to be asserted before sending the PTP packet in TX direction.
  • You shall ignore the RX timestamp when o_rx_ptp_ready is deasserted.
  • Training sequence (of any packet type) is required on the RX direction to complete RX PTP deskew process and only then o_rx_ptp_ready can be asserted. After the reset and a PMA adaptation, the IP asserts the signal after the link partner sends up to 20 Ethernet packets. Therefore, the o_rx_ptp_ready signal can be asserted at a much later time than the o_tx_ptp_ready signal, depending on whether the link partner is sending any packets.
  • The o_tx_ptp_ready is deasserted when triggering i_sl_tx_rsn_n or i_sl_csr_rst_n resets.
  • The o_rx_ptp_ready is deasserted when triggering i_sl_tx_rsn_n, i_sl_rx_rsn_n, or i_sl_csr_rst_n. In the TX reset case, even though the o_rx_ptp_ready is deasserted, it doesn't reset RX PTP deskew logic and there is no need for training sequence to assert o_rx_ptp_ready again.
  • The o_rx_ptp_ready signal is deasserted if the Ethernet link disconnects.
  • If you run a PMA adaptation after the Ethernet link is established, the Ethernet link goes down again and come back once the PMA calibration is completed.
  • During the reset or a major TOD update, you must wait for at most 2 Alignment Marker (AM) periods before sending a PTP packet in the TX direction. This provides sufficient time to load the new TAM value into the IP. You may observe a timestamp inaccuracy within these 2 AM periods. You can assume this AM period = (81,920 * 66 * 97 ps) = 524,451,840 ps for overall speed. You can ignore the RX timestamp within this period.
Note: For IEEE 1588 PTP enabled design, there is a temporary TX data corruption after the first link up event of power up sequence or a reset. As a result, the remote link partner observes temporary link down event and followed by the link up. TX packet corruption happens if there is packet transmission before the second link up event. Remote link partner is expected to handle link down event accordingly as per the IEEE specifications.

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