E-tile Hard IP User Guide: E-Tile Hard IP for Ethernet and E-Tile CPRI PHY Intel® FPGA IPs

ID 683468
Date 9/26/2022
Public
Document Table of Contents

2.12.2.5. Reset Sequencer RS-FEC Disable

Offset: 0x313

Reset Sequencer RS-FEC Disable Fields

Bit Name Description Access Reset
5 rsfec_disable Reset Sequencer RS-FEC Disable

Indicates to the reset sequencer that RSFEC has been disabled or bypassed.

0: RSFEC is enabled

1: RSFEC is disabled

RW 0x0

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